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||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| |||||||||||||||||||||||||| real - time clock module 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 1 pt7 c43190 features ? low current consumption: 0. 3 a typ. (v dd = 3.0v, t a = 25c) ? wide operating voltage range: 1.3 5 to 5.5 v ? minimum time keeping operation voltage: 1. 25 v ? built - in clock adjustment function ? built - in free user register ? 3 - wire (micro wire) cpu interface ? b uilt - in alarm interrupter ? built - in flag generator at power down or power on ? auto calendar up to the year 2099, automatic leap year calculation function ? built - in constant voltage circuit ? built - in 32 khz crystal oscillator circuit ? package : soic - 8l, ts sop - 8l , and t d fn 2 x3 - 8l function table item function pt7c43 1 90 1 oscillator source crystal * ? 2 time time display 12 - hour ? 24 - hour ? 3 interrup t alarm interrupt pin output ? 2 timer interrupt output ? 4 programmable square wave output (hz) 1hz,2h z,4hz 8hz,16hz 32khz 5 commu nication 3 - wire bus ? burst mode ? 6 control ic test mode ? power - on detector ? power supply voltage detector ? 7 clock calibration ? 80 free register access ? description the pt7c43190 is a cmos 3 - wire real - time clock ic , which operates with the very low current consumption and in the wide range of operation voltage. the operation voltage is 1.3 5 v to 5.5 v so that the rtc can be used for various power supplies from main supply to backup battery. in the system wh ich operates with a backup battery, the included free registers can be used as the function for users backup memory. users always can take back the information in the registers which is stored before power - off the main power supply, after the voltage is r estored. the ic has the function to correct advance / delay of the clock data speed, in the wide range, which is caused by the oscillation circuits frequency deviation. correcting according to the temperature change by combining this function and a temper ature sensor, it is possible to make a high precise clock function which is not affected by the ambient temperature. applications ? mobile game device ? digital still camera ? digital video camera ? electronic power meter ? dvd recorder ? tv, vcr ? mobile phone, phs pin configuration x o u t x i n v s s v d d s i o s c k 6 7 8 1 2 3 c s 4 5 i n t p t 7 c 4 3 1 9 0 s o i c - 8 t s s o p - 8 d f n 2 * 3
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 2 pin description pin no. pin name type description 1 int o output for interrupt signal . this pin outputs a signal of interrupt, or a clock pulse . by using the status register 2, users can select either of : alarm 1 interrupt, alarm 2 interrupt, output of user - set frequency, per - minute edge interrupt, minute - periodical interrupt 1 , m inute - periodical interrupt 2, or 32. 768 khz output. this pin has n ch open drain output. 2 x out o oscillator circuit output. tog ether with x1, 32.768khz crystal is connected between them. when 32.768khz external input, x2 must be float. 3 x in i oscillator circuit input. together with x1, 32.768khz crystal is connected between them. or external clock input. 4 vss p negative power supply pin . connects to gnd. 5 cs i chip select input pin . this pin is to input chip select, has a pull - down resistor. communication is available when this pin is in "h". if not using c ommunication, set this pin "l" or open. 6 sck i serial clock input pin . this pin is to input a clock pulse for serial interface. when the cs pin is in "h", the sio pin inputs / outp uts data by synchronizing with the clock pulse. when the cs pin is in "l" or open, the sck pin do es not accept inputting a clock pulse. 7 sio i /o serial d ata i/o pin . this pin is a data input / output pin of serial interface. when the cs pin is in "h", the s io pin inputs / outputs data by synchronizing with a clock pulse from the sck pin. the status is in "high - z" when t he cs pin is in "l" or o pen, so that the chip does not transmit data. setting the cs pin to "h" from "l" or open, this sio pin goes in the input status so that it receives the command data. this pin has cmos input and n ch open drain output. 8 vdd p positive power supply pin . con nect this vdd pin with a positive power supply. block diagram s e c o n d o s c i l l a t o r d i v i d e r , t i m i n g g e n e r a t o r i n t r e g i s t e r 1 i n t c o n t r o l l e r 1 c l o c k c o r r e c t i o n r e g i s t e r s t a t u s r e g i s t e r 1 s t a t u s r e g i s t e r 2 f r e e r e g i s t e r l o w p o w e r s u p p l y v o l t a g e d e t e c t o r p o w e r - o n d e t e c t i o n c i r c u i t c o n s t a n t - v o l t a g e c i r c u i t c o m p a r a t o r 1 m i n u t e h o u r d a y o f w e e k d a y m o n t h y e a r c o m p a r a t o r 2 r e a l - t i m e d a t a r e g i s t e r i n t r e g i s t e r 2 i n t c o n t r o l l e r 2 i n t r e g i s t e r 2 s e r i a l i n t e r f a c e s i o s c k c s i n t v s s v d d x o u t x i n p t 7 c 4 3 1 9 0
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 3 maximum ratings storage temperature ................................ ................................ ................... - 5 5 o c to +1 25 o c operating temperature ................................ ................................ .................. - 40 o c to +85 o c power supply voltage ................................ ................................ ........ vss - 0. 3 v to vss + 6.5 v dc input voltage (cs, sck , sio) ................................ ................... vss - 0.3v to vss + 6.5v dc out put voltage (sio, 32ko, sda, int) .............................. vss - 0.3v to vss + 6.5v control input voltage (en) ................................ ................................ .... - 0.5 v to +6.0 v power dissipation ................................ ................................ ............................. 25 0 m w recommended operating conditions symbol parameter conditions min t yp max unit v dd power supply volt age t a = ?40 to +85c 1.3 5 3.0 5.5 v t opr operating temperature v dd =1.3 5 to 5.5 v ? 40 +25 +85 c v ddt time keeping voltage range t a = ?40 to +85c 1.25 - 5.5 v v ddr register data hold voltage t a = ?40 to +85c 0.9 - 5.5 v c l crystal oscillator c l value - - 6 12.5 pf note * : reference value oscillation characteristics (t a = 25c, v dd = 3.0 v, v ss = 0 v, crystal oscillator (c l = 6 pf, 32.768 khz).) symbol parameter conditions min. typ. max. unit v sta oscillation start voltage within 10 seconds 1.1 - 5.5 v - oscillation start time - - - 3 s ic ic to ic frequency deviation - - 10 - +10 ppm v frequency voltage deviation v dd =1.3 to 5.5 v - 3 - +3 ppm note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or a ny other condi - tions above those indicated in the operational sec - tions of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 4 dc electrical characteristics ( t a = - 40 c to +85 c ; v ss = 0 v, crystal oscillator c l = 6pf, 32.768 khz , unless otherwise noted. ) symbol paramet er pin test conditions min typ max unit v dd = 3.0v i dd1 current consumption 1 v dd out of communication - 0. 3 0. 6 ua i dd2 current consumption 2 v dd during communication (sck=100khz) - 2.5 8 ua i izh input high leakage current sck,sio v in = v dd - 0.5 - +0. 5 ua i izl input low leakage current sck,sio v in = v ss - 0.5 - +0.5 ua i i1 input current 1 cs v in = v dd - 0 - u a i i2 input current 2 cs v in = 0.4v - 1.3 - u a i i3 input current 3 cs v in = 1.0v - 2 .6 - u a i ozh output high leakage current sio,int,32ko v o ut = v dd - 0.5 - +0.5 ua i ozl output low leakage current sio,int,32ko v out = v ss - 0.5 - +0.5 ua v ih input high voltage sck,sio,cs - 0.8 v dd - - v il input low voltage sck,sio,cs - - - 0.2 v dd i ol1 output low current 1 int, 32ko v out = 0.4v 1.0 1. 4 - ma i ol3 output low current 2 sio v out = 0.4v 5 10 - ma v det power supply voltage detection voltage *1 - - 0.70 1.05 1.40 v v dd = 5.0v i dd1 current consumption 1 v dd out of communication - 0. 3 5 0.7 ua i dd2 current consumption 2 v dd during communicatio n (sck=100khz) - 5.0 14 ua i izh input high leakage current sck,sio v in = v dd - 0.5 - +0.5 ua i izl input low leakage current sck,sio v in = v ss - 0.5 - +0.5 ua i i1 input current 1 cs v in = v dd - 0 - ua i i2 input current 2 cs v in = 0.4v - 2.3 - u a i i3 inpu t current 3 cs v in = 1.0v - 5.0 - u a i ozh output high leakage current sio,int,32ko v out = v dd - 0.5 - +0.5 ua i ozl output low leakage current sio,int,32ko v out = v ss - 0.5 - +0.5 ua v ih input high voltage sck,sio,cs - 0.8 v dd - - v il input low voltage sck,sio,cs - - - 0.2 v dd i ol1 output low current 1 int, 32ko v out = 0.4v 1.0 1. 4 - ma i ol3 output low current 2 sio v out = 0.4v 6 13 - ma v det power supply voltage detection voltage *1 - - 0.70 1.05 1.40 v note : *1. power supply voltage detection v oltage: constantly maintains the relation of v det > v dd rm (minimum register data hold voltage).
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 5 a c electrical characteristics measure conditions input pulse voltage v ih = 0.8 v dd , v il = 0.2 v dd input pulse rise/fall time 20ns output deter mination voltage v oh = 0.8 v dd , v ol = 0.2 v dd output load 80pf + pull - up resistance 10k symbol parameter v dd = 1.3 5 to 3.0 v (v dd = 3.0 v) v dd = 1.3 5 to 5.5 v (v dd = 5.5 v) unit min. typ. max. min. typ. max. t sck clock pulse width 5 - 2 50000 1 - 250000 s t ds setup before cs rise 1 - - 0.2 - - s t csh hold time after cs rise 1 - - 0.2 - - s t isu input setup time 1 - - 0.2 - - s t iho input data hold time 1 - - 0.2 - - s t acc output definition time *1 - - 3.5 - - - s t css setup b efore cs fall 1 - - 0.2 - - s t dh hold time after cs fall 1 - - 0.2 - - s t r , t f input rise/fall time - - 0.1 - - 0.05 s *1. since the output format of the sio pin is nch open - drain output, output data definition time is determined by the values of t he load resistance (r l ) and load capacity (c l ) outside the ic. therefore, use this value only as a reference value.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 6 recommended layout for crystal built - in capacitors specifications and recommended external capacitors parameter symbol typ. unit build i n capacitors xin to gnd c g 5 pf xout to gnd c d 5 pf recommended external capacitors for crystal cl=12.5pf xin to gnd c1 18 pf xout to gnd c2 18 pf recommended external capacitors for crystal c l =6pf xin to gnd c1 7 pf xout to gnd c2 7 pf note : the frequency of crystal can be optimized by external capacitor c1 and c2, for frequency=32 . 768 k hz, c1 and c2 should meet the equation as below: cpar + [(c1+cg)*(c2+cd)]/ [(c1+cg) + (c2+cd)] =cl cpar is all parasitical capacitor between x1 and x2. cl is cr ystals load capacitance. crystal specifications parameter symbol min. typ. max. unit nominal frequency f o - 32.768 - khz serial resistance esr - - 70 k load capacitance c l - 6/12.5 - pf
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 7 functional description 1. overview of functions 1.1. clock function cpu can read or write data including the year (last two digits), month, date, day, hour, minute, and second. any (two - digit) year that is a multiple of 4 is treated as a leap year and calculated automatically as such until the year 2099. 1.2. alarm function this device has two alarm system (alarm 1 and alarm 2) that outputs interrupt signals from int pin to cpu when the date, day of the week, hour, minute o r second correspond to the setting. each of them may output interrupt signal separately at a specified time. the alarm may be selectable between on and off for matching alarm or repeating alarm. 1.3. programmable square wave output for pt7c43190, square wave output at pin 1. six frequencies are selectable: 1, 2, 4, 8, 16, 32768 hz. 1.4. interface with cpu pt7c43190: 3 - wire interface. 1.5. calibration function with the calibration bits properly set, the accuracy can be improved to better than 2 ppm at 25c. 2. con figu ration of data communication 2.1. data communication after setting the cs pin "h", transmit the 4 - bit fixed code "0110", after that, transmit a 3 - bit command and 1 - bit read /write command. next, data is output or input from b7. regarding details refer to " 3 - wire serial interface". 0 f i x e d c o d e c o m m a n d 1 1 0 c 2 c 1 c 0 r / w b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 1 - b y t e d a t a r e a d / w r i t e b i t
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 8 2.2. configuration of command 8 types of command are available for the rtc. the rtc reads / writes the various registers by inputting these fixed codes and commands. the rtc does not perform any operation w ith any codes and commands other than those below. however, in case that the fixed codes or the commands are failed to be recognized in the 1st byte but are successfully recognized in the 2nd and hi gher bytes, the commands are executed. *1. write only f lag. the pt7c43190 initializes by writing "1" in this register. *2. scratch bit. this is a register which is available for read / write operations and can be used by users freely. *3. read only flag. valid only when use the alarm function. when the alarm t ime matches, this flag is set to "1", and it is cleared to "0" when reading. *4. read only flag. "poc" is set to "1" when power is applied. it is cleared to "0" when reading. regarding "bld", refer to " low power supply voltage detection circuit ". *5. test bit. be sure to set "0" in use. *6. no effect when writing. it is "0" when reading. 3. configuration of registers 3.1. real - time data register the real - time data register is a 7 - byte register that stores the data of year, month, day, day of the week, hour, minu te, and second in the bcd code. to write / read real - time data 1 access, transmit / receive the data of year in b7, month, day, day of the week, hour, minute, second in b0, in 7 - byte. when you skip the procedure to access the data of year, month, day, day of the week, read / write real - time data 2 accesses. in this case, transmit / receive the data of hour in b7, minute, second in b0, in 3 - byte. the rtc transfers a set of data of time to the real - time data register when it recognizes the read command. there fore, the rtc keeps precise time even if time - carry occurs during the read operation of real - time data register.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 9 year data (00 to 99): y1, y2, y4, y8, y10, y20, y40, y80 sets the lower two digits of the western calendar year (00 to 99) and links together with the auto calendar function until 2099. example: 2053 (y1, y2, y4, y8, y10, y20, y40, y80) = (1, 1, 0, 0, 1, 0, 1, 0) month data (01 to 12): m1, m2, m4, m8, m10 example: december (m1, m2, m4, m8, m10, 0, 0, 0) = (0, 1, 0, 0, 1, 0, 0, 0) day data (01 t o 31): d1, d2, d4, d8, d10, d20 the count value is automatically changed by the auto calendar function. 1 to 31: jan., mar., may, july, aug., oct., dec., 1 to 30: april, june, sep., nov. 1 to 29: feb. (leap year), 1 to 28: feb. (non - leap year) example: 29 (d1, d2, d4, d8, d10, d20, 0, 0) = (1, 0, 0, 1, 0, 1, 0, 0) day of the week data (00 to 06): w1, w2, w4 day of the week is counted in the order of 00, 01, 02, 03, 04, 05, 06, and 00. set up day of the week and the count value. hour data (00 to 23 or 00 to 11): h1, h2, h4, h8, h10, h20, am / pm in 12 - hour mode, write 0; am, 1; pm in the am / pm bit. in 24 - hour mode, users can write either 0 or 1. 0 is read when the hour data is from 00 to 11, and 1 is read when from 12 to 23.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 10 example (12 - hour mode): 11 p.m. (h1, h2, h4, h8, h10, h20, am / pm, 0) = (1, 0, 0, 0, 1, 0, 1, 0) example (24 - hour mode): 22 (h1, h2, h4, h8, h10, h20, am / pm, 0) = (0, 1, 0, 0, 0, 1, 1, 0) minute data (00 to 59): m1, m2, m4, m8, m10, m20, m40 example: 32 minutes (m1, m2, m4, m8, m10, m 20, m40, 0) = (0, 1, 0, 0, 1, 1, 0, 0) example: 55 minutes (m1, m2, m4, m8, m10, m20, m40, 0) = (1, 0, 1, 0, 1, 0, 1, 0) second data (00 to 59): s1, s2, s4, s8, s10, s20, s40 example: 19 seconds (s1, s2, s4, s8, s10, s20, s40, 0) = (1, 0, 0, 1, 1, 0, 0, 0) 3.2. status register 1 status register 1 is a 1 - byte register that is used to display and set various modes. the bit configuration is shown below. b1: bld this flag is set to "1" when the power supply voltage decreases to the level of detection voltage (vde t) or less. users can detect a drop in the power supply voltage. this flag is set to "1" once, is not set to "0" again even if the power supply increases to the level of detection voltage (vdet) or more. this flag is read - only. when this flag is "1", be su re to initialize. regarding the operation of the power supply voltage detection circuit, refer to " low power supply voltage detection circuit ". b2: int2, b3: int1 this flag indicates the time set by alarm and when the time has reached it. this flag is set to "1" when the time that users set by using the alarm interrupt function has come. the int1 flag at alarm 1 interrupt mode and the int2 flag at alarm 2 interrupt m ode are set to "1". set "0" in int1ae (b5 in the status register 2) or in int2ae (b1 in the status register 2) after reading "1" in the int1 flag or in the int2 flag. this flag is read - only. this flag is read once, is set to "0" automatically. b4: sc1, b5: sc0 these flags are sram type registers, they are 2 bits as a whole, can be freely set by u sers. b6: 12 / 24 this flag is used to set 12 - hour or 24 - hour mode. set the flag ahead of write operation of the real - time data register in case of 24 - hour mode. 0: 12 - hour mode 1: 24 - hour mode b7: reset the internal ic is initialized by setting this bit t o "1". this bit is write - only. it is always "0" when reading. when applying the power supply voltage to the ic, be sure to write "1" to this bit to initialize the circuit. regarding each status of data aft er initialization, refer to " register status after initialization ". 3.3. status register 2 status register 2 is a 1 - byte register that is used to display and set various modes. the bit configuration is shown below. b0: test this is a test flag. be sure to set this flag to "0" in use. if this flag is set to "1", be sure to initialize to set "0". b1: int2ae this is an enable bit for alarm 2 interrupt. when this bit is "0", alarm 2 interrupt is disabled. when it is "1", it is enabl ed. to use alarm 2 interr upt, access the int register 2 after enabling this flag. caution note that alarm 2 interrupt is output from the int pin regardless of the settings in flags b4 to b7. i n t 1 f e i n t 1 m e i n t 1 a e 3 2 k e s c 2 s c 3 i n t 2 a e t e s t b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 r / w r / w r / w r / w r / w r / w r / w r / w r / w : r e a d / w r i t e
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 11 b2: sc3, b3: sc2 these are 2 - bit sram type registers that can be freely set by users. b4: 32ke, b5: int1ae, b6: int1me, b7: int1fe these bits are used to select the output mode for the int pin. below table shows how to select the mode. to use alarm 1 interrupt, access the int register 1 after setting the alarm 1 interrupt mode. table: output m odes for int pin *1. don't care (both of 0 and 1 are acceptable). 3.4. int register 1 and int register 2 the int register 1 is to set up the output of user - set frequency, or to set up alarm 1 interrupt. the int register 2 is for setting alarm 2 interrupt. us ers are able to switch the output mode by using the status register 2. if selecting to use the output mode for alarm interrupt by status register 2; this register works as the alarm - time data register. in the int register 1, if selecting the output of user - set frequency by status register 2; this register works as the data register to set the frequency for clock output. from the int pin, a clock pulse and alarm interrupt are output, according to the or - condition that these two registers have. a. alarm interr upt users can set the alarm time (the data of day of the week, hour, minute) by using the int1 and int2 registers which are 3 - byte data registers. the configuration of register is as well as the data register of day of the week, hour, minute, in the real - t ime data register; is expressed by the bcd code. do not set a nonexistent day. users are necessary to set up the alarm - time data according to the 12 / 24 hour mode that they set by using the status register 1. int register 1 and int register 2 (alarm - ti me data) the int register 1 has a1we, a1he, and a1me at b0 in each byte. it is possible to make data valid; the data of day of the wee k, hour, minute which are in the corresponded byte; by setting these bits to "1". this is as well in a2we, a2he, and a2me in the int register 2. setting example: alarm time "7:00 pm" in the int register 1 (1) 12 - hour mode (status register 1 b6 = 0) set up 7:00 pm data written to int register 1
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 12 *1. don't care (both of 0 and 1 are acceptable). (2) 24 - hour mode (status register 1 b6 = 1) set up 19:00 pm data written to int register 1 *1. don't care (both of 0 and 1 are acceptable). *2 . set up am / pm flag along with the time setting. b. int register 1 and int register 2 ? ou tput of user - set frequency the int register 1 is a 1 - byte data register to set up the output frequency. setting each bit b7 to b3 in the register to "1", the frequency which corresponds to the bit is output in the and - form. sc4 to sc6 is 3 - bit sram type re gisters that can be freely set by users. int register 1 (data register for output frequency) example of output from int register 1 (data register for output frequency) _ ( * 1 ) 0 1 1 1 0 0 0 1 1 0 0 0 0 0 0 0 1 b 7 b 0 d a y o f t h e w e e k h o u r m i n u t e _ ( * 1 ) _ ( * 1 ) _ ( * 1 ) _ ( * 1 ) _ ( * 1 ) _ ( * 1 ) 0 1 0 0 1 1 0 1 ( * 2 ) 1 0 0 0 0 0 0 0 1 b 7 b 0 d a y o f t h e w e e k h o u r m i n u t e _ ( * 1 ) _ ( * 1 ) _ ( * 1 ) _ ( * 1 ) _ ( * 1 ) _ ( * 1 ) _ ( * 1 ) 1 h z 2 h z 4 h z 8 h z 1 6 h z s c 4 s c 5 s c 6 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 r / w r / w r / w r / w r / w r / w r / w r / w
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 13 1 hz clock output and second - counter 3.5. clock correct ion register the clock correction register is a 1 - byte register that is used to correct advance / delay of the clock. when not using this function, set this register to "00h". regarding the register values, refer to " function to clock correction ". 3.6. free register this free register is a 1 - byte sram type register that can be set freely by users. 4. power - on detection circuit and register status the power - on detection circuit operates by power - on the rtc, as a result each register is cleared; each register is set as follows. real - time data register: 00 (y), 01 (m), 01 (d), 0 (day of the week), 00 (h), 00 (m), 00 (s) status register 1: "01h" status register 2: "80h" int register 1: "80h" int register 2: "00h " clock correction register: "00h" free register: "00h" "1" is set in the poc flag (b0 in the status register 1) to indicate that power has been applied. to correct the oscillation frequency, the status register 2 goes in the mode the output of user - set fr equency, so that 1 hz clock pulse is output from the int pin. when "1" is set in the poc flag, be sure to initialize. the poc flag is set to "0" due to initialization so that the output of use r - set frequency mode is cleared. (refer to " register status afte r initialization ".) for the regular operation of power - on detection circuit, as seen in below figure , the period to power - up the rtc is that the voltage reaches 1.3 v within 10 ms after setting the ics power supply voltage at 0 v. when the power - on detect ion circuit is not working normally is; the poc flag (b0 in the status register) is not in "1", or 1 hz is not output from the in t pin. in this case, power - on the rtc once again because the internal data may be in the indefinite status. moreover, regarding the processing right after power - on, refer to " flowchart of initialization and example of real - time data set - up " . v 0 v 1 v 2 v 3 v 4 v 5 v 6 v 7 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 r / w r / w r / w r / w r / w r / w r / w r / w r / w : r e a d / w r i t e
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 14 *1. 0 v indicates that there are no potential differences between the vdd pin and vss pin. how to raise the power supply voltage 5. register status after initialization the status of each register after initialization is as follows. real - time data register: 00 (y), 01 (m), 01 (d), 0 (day of the week), 00 (h), 00 (m), 00 (s) status register 1: "0 b6 b5 b4 0 0 0 0 b" (in b6, b5, b4, the data of b 6, b5, b6 in the status register 1 at initialization is set. refer to below figure .) status register 2: "00h" int1 register: "00h" int2 register: "00h" clock correction register: "00h" free register: "00h" ? status register 1 data at initialization 6. low p ower supply voltage detection circuit the rtc has a low power supply voltage detection circuit, so that users can monitor drops in the power supply voltage by read ing the bld flag (b1 in the status register 1). there is a hysteresis width of approx. 0.15 v (typ.) between detection voltage and release voltage (refer to " characteristics (typical data) "). the low power supply voltage detection circuit does the sampling operation only once in one sec for 15.6 ms. if the power supply voltage decreases to the lev el of detection voltage (vdet) or less, "1" is set to the bld flag so that sampling operation stops. once "1" is detected in the bld flag, no sampling operation is performed even if the power supply voltage increases to the level of release voltage or more , and "1" is held in the bld flag. if the bld flag is "1" even after the power supply voltage is recovered, the internal circuit may be in the indefinite status. in th is case, be sure to initialize the circuit. after reading the bld flag, the sampling oper ation is restarted. without initializing, if the next bld flag reading is done after sampling, the bld flag gets reset to "0". in this case, be sure to initialize although the bld flag is in "0" because the internal circuit may be in the indefinite status.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 15 timing of low power supply voltage detection circuit 7. circuits power - on and low power supply voltage detection below figure shows the changes of the poc flag and bld flag due to vdd fluctuation. poc flag and bld flag 8. nonexistent data and end - of - mon th when users write the real - time data, the rtc checks it. in case that the data is invalid, the rtc does the following procedures. ? processing of nonexistent data *1. in 12 - hour mode, write the am / pm flag (b1 in hour data in the real - time data register ). in 24 - hour expression, the am / pm flag in the real - time data register is omitted. however in the flag of reading, users are able to read 0; 0 to 11, 1; 12 to 23. *2. processing of nonexistent data, regarding second data, is done by a carry pulse which is generated in 1 second, after writing. at this point the carry pulse is sent to the minute - counter. ? correction of end - of - month a nonexistent day, such as february 30 and april 31, is set to the first day of the next month.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 16 9. alarm and interrupt output 9.1. in t pin output mode these are selectable for the int pin output mode; alarm 1 interrupt, alarm 2 interrupt, the output of user - set frequency, per - minute edge interrupt output, and minute - periodical interrupt output 1 and 2, 32.768 khz output. in alarm 1 inte rrupt / output of frequency; set data in the int register 1. in alarm 2 interrupt, set data in the int register 2. to switch the output mode, use the status register 2. refer to " status register 2 " in " configuration of registers ". when switching the output mode, be careful of the output status of the pin. especially, when using alarm interrupt / output of frequency, switch the output mode after setting "00h" in the int register 1 or 2. alarm 2 interru pt is dependent from other modes. regardless of other set tings of mode if alarm 2 interrupt was generated, be careful that "l" is output from the int pin. in 32.768 khz output / per - minute edge interrupt output / minute - periodical interrupt output, it is unnecessary to set data in the int register 1 or 2 for use rs. refer to the followings regarding each operation of output modes. a. alarm i nterrupt o utput alarm interrupt output is the function to output "l" from the int pin, at the alarm time which is set by user has come. if se tting the pin output to "h", turn off the alarm function by setting "0" in int1ae / int2ae in the status register 2. to set the alarm time, set the data of day of the week, hour, minute in the int register 1 or 2, set the data of year, month, and day in the int reg ister 1 or 2. refer to " int register 1 and int register 2 " in " configuration of register ". ? alarm setting of "w (day of the week), h (hour), m (minute)" *1. if users clear int1ae / int2ae once; "l" is not output from the int pin by setting int1ae / int2ae enable again, within a peri od when the alarm time matches real - time data. alarm interrupt output timing
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 17 ? alarm setting of h (hour)" *1. if users clear int1ae / int2ae once; "l" is not output from the int pin by setting int1ae / int2ae enable again, within a period when the alarm time matches real - time data. *2. if turning the alarm output on by changing the program, within the period when the alarm time matches real - time data, "l" is output again from the int pin when the minute is counted up. alarm interrupt output timing b. output of user - set frequency the output of user - set frequency is the function to output the frequency which is selected by using data, from the int pin, in the and - form. set up the data of frequency in the int register 1. output timing of user - set freque ncy c. per - minute e dge i nterrupt o utput per - minute edge interrupt output is the function to output "l" from the int pin, when the first minute - carry processing is done, after selecting the output mode. to set the pin output to "h", set "0" in int1me in the st atus register 2 to turn off the output mode of per - minute edge interrupt.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 18 *1. pin output is set to "h" by disabling the output mode within 7.81 ms, because the signal of this procedure is maintained for 7.81ms. note that pin output is set to "l" by setti ng enable the output mode again. timing of per - minute edge interrupt output d. minute - periodical interrupt output 1 the minute - periodical interrupt 1 is the function to output the one - minute clock pulse (duty 50%) from the int pin, when the first minute - carr y processing is done, after selecting the output mode. *1. setting the output mode disable makes the pin output "h", while the output from the int pin is in "l". note that pin output i s set to "l" by setting enable the output mode again. timing of minute - periodical interrupt output 1 e. minute - periodical interrupt output 2 the output of minute - periodical interrupt 2 is the function to output "l", for 7.81 ms, from the int pin, synchronizing with the first minute - carry processing after selecting the output m ode. however, during reading in the real - time data register, the procedure delays at max. 0.5 seconds thus output "l" from the int pin also delays at max. 0.5 seconds during writing in the real - time data register, some delay is made in the output period du e to write timing and the second - data during writing. ? during normal operation
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 19 ? during reading in the real - time data register ? during writing in the real - time data register timing of minute - periodical interrupt output 2 f. operation of power - on detec tion circuit when power is applied to the rtc, the power - on detection operates to set "1" in the poc flag (b0 in the status register 1). a 1 hz clock pulse is output from the int pin. 9.2. alarm 1 function and int2 pin output mode in the output mode for int 2 pin, users are able to select the output; alarm 2 interrupt, user - set frequency, per - minute edge interrupt, minute - periodical interrupt. to switch the output mode for int2 pin and the alarm 1 function, use the status register 2. refer to " status register 2 " in " configuration of registers ". when switching the output mode for int2 pin, be careful of the output status of the pin. especially, when using alarm 2 interrupt output, or the output of user - set frequency, switch the output mode after setting "00h" i n the int2 register. in per - minute edge interrupt output / minute - periodical interrupt output, it is unnecessary to set data in the int2 register for users. refer to the followings regarding each operation of output modes.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 20 a. alarm 1 function and alarm 2 inte rrupt alarm 2 interrupt output is the function to set the int2 flag "h" by the output "l" from the int2 pin, at the alarm time whic h is set by user has come. if setting the pin output to "h", turn off the alarm function by setting "0" in int2ae in the sta tus register 2. by reading, the int2 flag is once cleared automatically. in the alarm 1 function, the int1 flag (b3 in the status register 1) is set to "h" when the set time has come. the int1 flag is also cleared once by reading. in the alarm 1 function, set the data of day of the week, hour, minute of the alarm time in the int1 register. in alarm 2 interrupt, set in the int2 register. 1) alarm setting of "w (day of the week), h (hour), m (minute)" *1. if users clear int2ae once; "l" is not output from th e int2 pin by setting int2ae enable again, within a period when the alarm time matches real - time data. alarm interrupt output timing
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 21 2) alarm setting of "h (hour)" *1. if users clear int2ae once; "l" is not output from the int2 pin by setting int 2ae enable again, within a period when the alarm time matches real - time data. *2. if turning the alarm output on by changing the program, within the period when the alarm time matches real - time data, "l" is output again from the int2 pin when the minute is counted up. alarm interrupt output timing b. output of user - set frequency the output of user - set frequency is the function to output the frequency which is selected by using data, from the int2 pin, in the and - form. set up the data of frequency in the int2 r egister. refer to " int1 register and int2 register " in " configuration of registers ". output timing of user - set frequency c. per - minute edge interrupt output per - minute edge interrupt output is the function to output "l" from the int2 pin, when the first mi nute - carry processing is done, after selecting the output mode. to set the pin output to "h", in the int2 pin output mode, input "0" in int2me in the status register 2 in order to turn off this mode.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 22 *1. pin output is set to "h" by disabling the output m ode within 7.81 ms, because the signal of this procedure is maintained for 7.81 ms. note that pin output is set to "l" by setting enable the output mode again. timing of per - minute edge interrupt output d. minute - periodical interrupt output 1 the minute - peri odical interrupt 1 is the function to output the one - minute clock pulse (duty 50%) from the int2 pin, when the first minute - carry processing is done, after selecting the output mode. *1. setting the output mode disable makes the pin output "h", while the output from the int2 pin is in "l". note that pin output is set to "l" by setting enable the output mode again. timing of minute - periodical interrupt output 1 10. function to clock correction the function to clock correction is to correct advance / delay of the clock due to the deviation of oscillation frequency, in order to make a high precise clock. for correction, the rtc adjusts the clock pulse by using a certain part of the dividing circuit, n ot adjusting the frequency of the crystal oscillator. correcti on is performed once every 20 seconds (or 60 seconds). the minimum resolution is approx. 3 ppm (or approx. 1 ppm) and the rtc corrects in the range of ? data, refer to " 15.2. how to calculate ". when not using this function, be sure to set "00 h". function to clock correction
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 23 10.1. setting values for registers and correction values setting values for registers and correction values (minimum resolution: 3.052 ppm (b0 = 0)) setting values for registers and correction values (minimum resolution: 1 .017 ppm (b0 = 1))
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 24 10.2. how to calculate a. if current oscillation frequency > target frequency (in case the clock is fast) caution the figure range which can be corrected is that the calculated value is from 0 to 64. *1. convert this value to be set in the clock correction register. for how to convert, refer to " calculation example 1 " . *2. measurement value when 1 hz clock pulse is output from the int pin. *3. target value of average frequency when the clock correction function is used. *4. refer to " function to clock correction ". ? calculation example 1 in case of current oscillation frequency actual measurement value = 1.000070 [hz], target oscillation frequency = 1.000000 [h z], b0 = 0 (minimum resolution = 3.052 ppm) convert the correction value " 106" to 7 - bit binary and obtain "1101010b". reverse the correction value "1101010b" and set it to b7 to b1 of the clock correction register. thus, set the clock correction register: (b7, b6, b5, b4, b3, b2, b1, b0) = (0, 1, 0, 1, 0, 1, 1, 0) b. if current osc illation frequency < target frequency (in case the clock is fast) caution the figure range which can be corrected is that the calculated value is from 0 to 62. ? calculation example 2 in case of current oscillation frequency actual measurement value = 0. 999920 [hz], target oscillation frequency = 1.000000 [hz]. b0 = 0 (minimum resolution = 3.052 ppm) thus, set the clock correction register: (b7, b6, b5, b4, b3, b2, b1, b0) = (1, 1, 0, 1, 1, 0, 0, 0) ? calculation example 3 in case of current oscillation frequency actual measurement value = 0.999920 [hz], target oscillation frequency = 1.000000 [hz], b0 = 1 (minimum resolution = 1.017 ppm) this calculated value exceeds the correctable range 0 to 62. b0 = "1" (minimum resolution = 1.017 ppm) indicates th e correction is impossible.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 25 10.3. how to confirm a setting value for a register and the result of correction this rtc does not adjust the frequency of the crystal oscillation by using the function of clock correction. therefore users cannot confirm if it is c orrected or not by measuring output 32.768 khz. when the function of clock correction is being used, the cycle of 1 hz clock pulse output from the int pin changes once in 20 times or 60 times, as shown in below figure. confirmation of the clock correctio n measure a and b by using the frequency counter *1 . calculate the average frequency (tave) based on the measurement results. calculate the error of the clock based on the average frequency (tave). the following shows an example for confirmation. confirmation example: when b0 =0, 66h is set measurement results: a = 1.000080 hz, b = 0.998493 hz calculating the average frequency allows to confirm the result of correction. *1. use a high - accur acy frequency counter of 7 digits or more. caution measure the oscillation frequency under the usage conditions. 11. serial interface 11.1. 3 - wire serial interface the pt7c43190 receives various commands via 3 - wire serial interface to read / write data. regarding t ransmission is as follows. a. data reading when data is input from the sio pin in synchronization with the falling of the sck clock after setting the cs pin to "h", the data is loaded internally in synchronization with the next rising of the sck clock. when r / w bit = "1" is loaded at the eighth rising of the sck clock, the state of data reading is entered. data corresponding to each command is then output in synchronization wit h the falling of the subsequent sck clock input. when the sck clock is less than 8, the ic is in the clock - wait status, and no processing is performed. b. data writing when data is input from the sio pin in synchronization with the falling of the sck clock after setting the cs pin to "h", the data is loaded internally in synchronization with the next rising of the sck clock. when r / w bit = "0" is loaded at the eighth rising of the sck clock, the state of data writing is entered. in this state, the data, which is input in synchronization with the falling of the subsequent sck clock inpu t, is written to registers according to each command. in data writing, input a clock pulse which is equivalent to the byte of the register. as well as reading, when the sck clock is less than 8, the ic is in the clock - wait status, and no processing is perf ormed.
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 26 c. data access ? real - time data 1 access real - time data 1 access ? real - time data 2 access real - time d ata 2 a ccess ? status register 1 access and status register 2 access *1. 0: status register 1 selected 1: status register 2 selected status register 1 access and status register 2 access
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 27 ? int register 1 access and int register 2 access in read / write the int register 1, data varies depending on the setting of the status register 2. be sure to read / write th e int register 1 after setti ng the status register 2. when setting the alarm by using the status register 2, these registers work as 3 - byte alarm time data registers, in other statuses, they work as 1 - byte registers. when outputting the user - set frequency, they are the data registers to set up the frequency. read / write the int register 2 after setting int2ae in the status register 2. when int2ae is in "1", the int register 2 works as for setting the 3 - byte alarm time data. the int register 2 does not have the function to output the user - set frequency. regarding details of each data, refer to " int register 1 and int register 2 " in " configuration of register ". caution users cannot use both functions of alarm 1 interrupt and the output of user - set frequency simultaneously. *1. 0: status register 1 selected 1: status register 2 selected int register 1 access and int register 2 access int register 1 (data register for output frequency) access
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 28 ? clock correction register access clock correction register access ? free register access free register access
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 29 12. flowchart of initialization and example of real - time data set - up *1. do not communicate for 0.5 seconds since the power - on detection circuit is in operation. *2. reading the real - time data 1 should be completed w ithin 1 second after setting the real - time data 1. example of initialization flowchart
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 30 13. examples of application circuits caution : start communication under stable condition after power - on the power supply i n the system. caution : the above connection diagrams do not guarantee operation. set the constants after performing sufficient evaluation using the actual application. examples of application circuits for pt7c43190 mechanical information ts sop - 8l
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 31 soic - 8l
|||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||| ||||||||||||||||||||||| ||||||||| 2 01 5 - 09 - 00 1 5 pt0 274 - 7 1 0 / 1 6 /15 32 t d fn 2 x 3 - 8l ordering information part no. package code package pt7c43190le l lead free and green 8 - pin tssop pt7c43190le x l lead free and green 8 - pin tssop tape/reel pt7c43190we w lead free and green 8 - pin soic pt7c43190we x w lead free a nd green 8 - pin soic tape/reel pt7c43190zee ze lead free and green 8 - pin tdfn 2x 3 note: ? e = pb - free and green ? adding x suffix = tape /r eel pericom semiconductor corporation ? 1 - 800 - 435 - 2336 ? www.pericom.com pericom reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. pericom does not assume any responsibility for use of any circuitry descri bed other than the circuitry embodied in pericom product. the company makes no representations that circuitry described herein is free from patent infringement or other rights, of pericom .

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